This invention relates to processing analog signals in a manner which accommodates a wide dynamic range of signal amplitude. In particular, the invention relates to processing signals in two or more channels which convey related information. A particular application is in the processing of complex number based signals in the form of in-phase and quadrature-phase components.
Radio and other wireless receivers must accommodate a wide range of signal levels. This wide dynamic range involves many factors such as path loss and variation in receiver gain. Automatic gain control (AGC) circuits have conventionally been employed for automatically controlling the gain of the receiver to narrow the dynamic range within the receiver. Typically, these gain control circuits employed feedback circuitry which slowed the gain control operation. Input signal level changes caused gain changes through a feedback loop, which required time to damp out. Each current output value was affected by the preceding values. The feedback loop introduced delay in the response which caused a transient in the desired output.
In U.S. Pat. No. 4,263,560, entitled “LOG-EXPONENTIAL AGC CIRCUIT,” of Ricker, FIGS. 1 and 3 show prior art implementations of feedback-based AGC circuits.
Logarithmic amplifiers are well known and described in detail in the books by Richard Smith Hughes entitled Logarithmic Amplification and Logarithmic Video Amplifiers, which are cited here for general background in the field.
A circuit used to compute the angle of complex signal comprising in-phase (I) and quadrature-phase (Q) components using logarithms of these I and Q components is described in U.S. Pat. No. 3,792,246, entitled “VECTOR ANGLE COMPUTER,” of Gilbreath et al. In this patent, a single circuit is disclosed which can be used to generate the logarithmic transfer characteristic, with the further ability to compute the difference of logs.
A phase detector which takes as inputs logarithms of input I and Q signals is described in U.S. Pat. No. 5,001,489, entitled “DIGITAL PHASE DETECTOR,” of Taylor, Jr. In this system, the input digital signals are logarithms of the square of in-phase and quadrature-phase components of a signal and are subtracted in the phase detector to produce a signal having a magnitude and a polarity. The polarities of the difference signals and of the two information signals are used to determine the octant of the phase angle by addressing a table found in a read only memory. Similarly, the magnitude of the difference signal is used as an address of a read only memory storing digital values corresponding to angles within an octant. Use of a pre-computed memory element is an integral part of this patent to avoid the requirement of “extremely fast processors or specially constructed arithmetic processors for performing calculations in hardware.”
In U.S. Pat. No. 4,692,889, entitled “CIRCUITRY FOR CALCULATING MAGNITUDE OF VECTOR SUM FROM ITS ORTHOGONAL COMPONENTS IN DIGITAL TELEVISION RECEIVER,” inventor McNeely describes a circuit which calculates the magnitude of a vector from its orthogonal components. Its relevance is to the definition of a norm of a signal.
Dillman, U.S. Pat. No. 4,910,465, entitled “PHASE DETECTOR,” describes a similar circuit in which the logarithmic transfer function is applied to signals which have been previously digitized.
Pan et al., in U.S. Pat. No. 5,936,871, entitled “METHOD AND SYSTEM FOR PERFORMING L2 NORM OPERATION,” describes a numerical method for computing the distance between two vectors. The system of Pan, et al. describes and claims a system whose topology includes data pipelines, an inverse-logarithm converter, and an accumulator. The signals presented to the digital circuit do not correspond to the logarithms of signal. The Pan et al. system employs a feedback stage.
What is needed is a circuit capable of accommodating a large dynamic range signal without the limitations attendant with feedback and AGC circuits.